While MLIR provides its users with the infrastructure to create new dialects, lowerings and rewrites to support efficient domain-specific and ML workload compilation, the front-ends that generate MLIR have not been fully explored. In particular, it is common to either write SSA-based MLIR code in high-level dialects, or re-implement the code generation flow from the source language to MLIR. Both approaches are not developer-friendly because they require maintenance and significant development effort. In this poster session, we present how MLIR can be embedded into Python, allowing one to generate non-SSA Pythonic front-ends based on the dialect specifications. Moreover, we discuss how the front-ends can be statically compiled to SSA-based MLIR or even dynamically executed. We evaluate our work by presenting examples of front-ends for zero-knowledge proof or RISC-V compilers.

Unifying HPC Compilers: A look into stencil, MPI and other HPC dialects (Anton Lydike)

Stencil computation and domain decomposition is a common task for HPC compilers. Many frameworks implement their own ways of running stencil computations on supercomputers using some form of distributed memory parallelism (DMP). I will present our work towards a set of dialects that enable high-level analysis of stencil computation and DMP in a reusable fashion, opening up the potential for optimizations beyond what state-of-the-art tools offer.

DSLs provide an ability to express computation at an abstract level, however they can often be heavily siloed and share little or no infrastructure. I will present work we have done to integrate the PSyclone DSL with MLIR via xDSL, enabling the DSL compiler to build upon the dialects and transformations that are present in MLIR and xDSL to significantly reduce the amount of bespoke compiler infrastructure that needs to be present.

Heterogeneous ultra-low power hardware and the challenges of writing software for them (Luka Macan)

In the PULP group, we develop various hardware components with a focus on efficient ultra-low power processing. Only in the last couple of years, our ecosystem grew from having one platform to several families of platforms with each having a few representative chips. This presentation will focus on the other side of the medallion, which is the software support for our heterogeneous hardware platforms. I will present the challenges of writing software for the PULP platforms and how we tackled them so far to leave the audience with a question, can we do better?

base2: Generalized binary numerals in MLIR (Karl Friebel)

Currently, MLIR users rely on the arith dialect to fill the role of a target-agnostic provider of arithmetic operations on integers and floating-point numbers. While it provides a direct interface with LLVM, it lacks important features such as strong guarantees for well-defined behavior and poison semantics. Additionally, it implicitly carries a representational bias. We implemented a dialect stack for target-agnostic arithmetic centered around a high-level interface dialect base2 that generalizes fixed-point and floating-point binary numerals. Its lower dialects are strongly separated components of a complete fission of arith. They can be used as a replacement for arith, but also to perform fine-grained code generation for reconfigurable targets via bootstrappable parametric types - our original goal.

gg-mlir: Distributed and cached work execution with MLIR (Jeff Niu)

This talk will present gg-mlir, an IR and remote work execution engine built with MLIR for instantly scaling workloads to serverless cloud platforms, like AWS Lambda. A typical use-case would be distributed code compilation. The talk will focus on the IR, some of the system architecture, and how traditional compiler and graph optimization techniques (like graph partitioning, PGO) can be applied to this domain.

• Scalable Vectorization
• MLIR "concepts": Legality of and infrastructure for specializations of the fancy pointers (Attribute, Type, Op[State])
• Graphs in MLIR (Graph dialect, GraphBLAS dialect and friends)
• Front end ML dialects

• Formal verification of MLIR dialects or operations
• Targeting all the PULP hardware platforms with one compiler toolchain
• To lift or not to lift? When your source translates into memref & loop dialects.

• MLIR fuzzing testing
• Automatic differentiation with MLIR
• PDL development

• Rethinking DMA operations - base on (sub)views, relevance to async dialect.
• IRDL + PDL Pass pipeline integration TCP + Linalg
• MLIR frontends for C and extensions